Re: gEDA-user: Random thoughts on the future interface of PCB

[Martin Kupec <martin.kupec@xxxxxxxxx>]

On Wed, Dec 15, 2010 at 01:02:25AM +0000, Peter Clifton wrote:
> On Tue, 2010-12-14 at 22:57 +0100, Martin Kupec wrote:
> 
> > 	Sometimes, when you place to lines too close, but not that close
> > 	in polygon. It will make thin line in the polygon connecting two
> > 	part of the polygon. DRC will mark this line as too thin.
> 
> Actually, I'm pretty sure the DRC will miss this error (unless the thin
> line was _required_ for some connectivity), - And even then I'm not 100%
> sure.
	It misses the error. I have found old bug describing this
	behaviour.
> 
> >  It
> > 	should automaticly erase such lines. Any proposal, how to fix
> > 	this?
> 
> It is quite a hard problem to solve actually.. I'll have a think about
> it... it really needs solving, and I've been looking at / thinking about
> polygons recently.
	You are probably the most qualified one :-).
> 
> > 	When you make a via in polygon. Change the clerance to too
> > 	small value and add thermal(even full thermal). DRC will mark
> > 	this via as having too smal clearance. This seems like bug to
> > 	me.
> 
> Sounds like ;) (I'll point you at a bug tracker to file it at some
> point, but we're probably going to move trackers pretty soon anyway, so
> you might have the honour of filing the first (new) bug in the new bug
> tracker if you wait a while!).
	I am trying to file a bug at launchpad.net.
> 
> > 	Bigger issues is that when I drag component, lines are dragged
> > 	with it. This is fine, but the lines do not respect any
> > 	orthogonal/45 deg rules.
> 
> You can switch off rubber-band mode in the settings menu. More
> intelligent rubber-banding could be done in the future, but is not
> trivial to implement.
	I know that this is problematic. I can work with current state.
	I just pointed to all problems I had :-).
> 
> > 	I cannot simply unmask part of the board. I know how to do it,
> > 	but that is not optimal. Having some Solder mask layer with
> > 	polygons clearing solder mask would be neat.
> 
> Future TODO item for when we re-work layer support in (some) future PCB
> version. I'd expect it will not happen any time soon.
	There is a patch on tracker(ID 2986641). It add few new layers
	and one of them is component_mask(and solder_mask).
	What do you think about that patch? It doesn't apply currently,
	but it can be a starting point.

		Martin Kupec



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