Re: gEDA-user: New user - Hierarchy problem

["Steven Taylor" <steven.taylor56@xxxxxxxxxxxxx>]

Continuing my checking, I have found that *all* the nets on the lower  
level schematics are showing up in the net list file twice, first as  
separate nets and then again as included in the proper nets with all the  
pins from the lower levels combined with the top level connections. The  
reason those particular nets were being flaged is that they were the only  
nets that had only one pin connection on the lower level schematic. There  
must be a setting somewhere to stop this behavior. I just have no idea  
where it would be.
Steve

On Mon, 11 Feb 2008 13:47:54 -0800, Steven Taylor  
<steven.taylor56@xxxxxxxxxxxxx> wrote:

> Actually, I have to take that back, the nets do show up correctly
> connected for all of the IOs, but the pins on the lower level schematic
> also show up in the net list as nets with only a single pin. So those  
> nets
> in question are actually in the net list twice, once as single pin nets
> and then again as correctly connected to the other pins that are also in
> the net. Interesting. Now, why is this happening? Is it something I have
> wrong or is it a bug? I am not doing my own board layout so I can just
> edit out the offending nets in the netlist file before I send it to my
> layout guy. It would be nice to know why it's happening though.
> Steve
>
>
> On Mon, 11 Feb 2008 13:09:40 -0800, Peter Clifton <pcjc2@xxxxxxxxx>  
> wrote:
>
>>
>> On Mon, 2008-02-11 at 13:07 -0800, Steve Taylor wrote:
>>
>>> I am evidently doing something wrong and I need some help in pointing  
>>> me
>>> in the right direction.
>>
>> It might be that the drc2 backend doesn't support this very well. Does
>> the netlist look OK when you netlist for the circuit layout software
>> you're using?
>>
>
>
>



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