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Re: gEDA-user: New user - Hierarchy problem
My symbol, that I created, that represents my lower level schematic has
pins with only pin numbers, pinseq numbers, and pin labels. The pin labels
match the refdes on the IO connectors on the underlying schematic. That is
the way it was done on the gTAG example. I tried assigning pintypes to the
IO connectors but that didn't seem to make any difference.
Steve
On Mon, 11 Feb 2008 13:51:33 -0800, John Griessen <john@xxxxxxxxxxxxxx>
wrote:
> Steve Taylor wrote:
>
>> When I run the same command on the top level schematic, I get a long
>> list
>> of "Duplicated references for every symbol in the underlying schematic,
>> I
>> get another list for duplicate slot 1 of every symbol, and I get errors
>> on
>> three of my inputs, listing the components to which they should have
>> been
>> connected, saying the nets connect to only one pin.
>
> I run drc2 on a similar schematic and get just minor warnings
> NOTE: Found pins without the 'pintype' attribute: U6:3 U6:4 U6:2 U6:5
> U6:6 U6:1 U6:8 U6:7 U5
>
> WARNING: Pin(s) with pintype 'input/output': U2:6
> are connected by net 'GND'
> to pin(s) with pintype 'power': U2:7 U2:8
>
> These I know I can ignore in my case.
>
> The offpage symbols have attribs device=none pintype=pas
> refdes=SENVDD1 pinnumber=1
>
> Does your top schematic have symbols with pins that have the same name
> as refdes=SENVDD1 with pinlabel=SENVDD1?
>
> This is going to be a symbol you create.
>
> John Griessen
>
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