Re: gEDA-user: transition of pcb internal units to metric (SI, mm)

[Andrew Miner <zminer@xxxxxxxxx>]

   >From: rickman <[1]gnuarm.geda@xxxxxxxxx>
   >Date: Tue, 08 Feb 2011 02:44:09 -0500
   >Subject: Re: gEDA-user: transition of pcb internal units to metric
   (SI, mm)
   >  The cost to [1]tape-out a chip at 90 nm is at least US$1,000,000 and
   >  exceeds US$3,000,000 for 65 nm.^[2][40]
   >  Do you expect these tools to be used to design chips costing far,
   far
   >  over $3 Million just for the mask set?
   [2]http://en.wikipedia.org/wiki/Multi-project_wafer_service
   You can share space on the IC wafer with multiple other companies,
   where everyone splits the cost of the masks roughly equally.   The mask
   design accounts for the vast majority of the cost, the raw materials
   are essentially gimmes, and the production of a batch of wafers from a
   mask set is cheap compared to the mask cost.
   The current standard for wafer diameter is 300 mm (11.8") => 109 sq
   inches.  You would loose about 1/4 of the area to the edge effects on
   the wafer so you are looking at ~75 in sq of usable space.  When you
   consider that most of the parts that we use on our PCBs have an IC die
   size of (much) less than 1/2 of a sq inch, you could reasonably hope to
   fit 100 different chips on a wafer.  That would drop the $1 to $3
   million dollars down to $10,000 to $30,000 per chip on the wafer.  They
   can then make a hundred wafers easily on the first batch, so there
   would be 100 of each chip for that cost.   If you were talking about a
   0.1 sq inch chip, as a student project, you might be able to get in
   cheaper than that.
   Granted, PCB is NOT a VLSI layout tool, as John Doty eluded to, so I
   don't think we need to force 1 nm internal units for that reason.  I
   would not be inclined to make PCB a VLSI layout tool either.
   Andy Miner

References

   1. mailto:gnuarm.geda@xxxxxxxxx
   2. http://en.wikipedia.org/wiki/Multi-project_wafer_service


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