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Re: gEDA-user: PAL/CPLD programming



William Dieter wrote:
On Tue, 11 Jan 2005 16:02:48 -0800, Stephen Williams <steve@xxxxxxxxxx> wrote:

Icarus PAL should include a pal.tgt plug-in for Icarus Verilog
that adds a code generator to Icarus Verilog. This code generator
can *write* JEDEC files.

I don't suppose its the sort of thing someone who has used 22v10's and
iverilog, but is not intimately familiar with JEDEC format and icarus
internals could knock out in a couple of afternoons?  If not I'll
probably punt and go with one of the windows programs, though I might
try PALASM under wine or dosemu to see how well it works...


As Charles pointed out, it would require some C programming skill and knowledge of logic minimization. The Icarus Verilog synthesizer takes care of allocating registers, but the netlist of logic that it produces needs to be converted to sum-of-products that PLDs take. It would, for example, make a good undergrad EE mid-term project, or an experienced EE could do it in a week or so. That is, an experienced EE with the time to spare:-(

It would be nice to get IPAL finished up, as this seems to be
a niche in need of filling after all.

--
Steve Williams                "The woods are lovely, dark and deep.
steve at icarus.com           But I have promises to keep,
http://www.icarus.com         and lines to code before I sleep,
http://www.picturel.com       And lines to code before I sleep."