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Re: gEDA-user: gEDA on windows
Dan McMahill wrote:
> Joerg wrote:
>> Mark Rages wrote:
>>> On Mon, Jan 12, 2009 at 1:36 PM, Joerg <joergsch@xxxxxxxxxxxxxxxxxxxxx> wrote:
>>>> John Doty wrote:
>>>>
>>>> Ok, I'll try, it's been a long time since I tested it:
>>>>
>>>> Take the LM324 as an example. It is a chip with four opamps in there:
>>>> http://www.national.com/ds/LM/LM124.pdf
>>>>
>>>> When you place the first instantation it'll be pins 1,2,3, the next one
>>>> 5,6,7 and so on. But all are supplied via the common supply pins 4 and
>>>> 11. In gschem you only have two choices. Either you create a library
>>>> model that repeats those pins 4 and 11 visibly for all four
>>>> instantations or you create the library part with the power pins
>>>> detached where none of the instantations show power pins. This can be
>>>> practical for auto-connecting digital stuff to a VCC rail but it doesn't
>>>> work well in the analog world. Now you could also have pins 11 and 4 as
>>>> a separate "fifth" device. Anyhow, neither method looks professional,
>>>> neither is industry practice, and all make schematics more difficult to
>>>> understand for others. Especially for non-analog guys.
>>>>
>>> You can always use two symbols, one with power pins and one without.
>>> That's what I do.
>>>
>> But if you do that, can you call the first one U12A and have power pins,
>> then next one U12B, then U12C and U12D without but so it sticks during
>> renumbering and also correctly netlists? When I tried that the refdeses
>> were messed up at the next renumbering.
>
> Please file that as a bug report. I suspect that you are correct that
> at least refdes_renum doesn't play well with slotting.
>
From Ales' post I am assuming that it ain't desired to file this as a
bug report ;-)
--
Regards, Joerg
http://www.analogconsultants.com/
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