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Re: gEDA-user: Soft and Hard symbols

Kai-Martin Knaak <kmk@xxxxxxxxxxxx> writes:
> (I smell the scent of a feature request ;-)

Like http://www.delorie.com/pcb/pin-mapping.html ?

That lets the designer defer slot, package, and pin assignments until
layout time.

It assumes there's a unique identifier (not the refdes!) for each
symbol, so PCB can swap/merge/assign gates across packages.

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