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Re: gEDA-user: Thermals on Pads

On Mon, 2011-01-31 at 13:09 -0700, asomers@xxxxxxxxx wrote:
> The IPC-2222 table of contents shows that "Thermal Relief in Conductor
> Planes" gets only one tenth of a page.  I can't imagine any detailed
> information in that space.  It's sister document, IPC-2221, can be
> found for free at
> http://www.victronics.cl/Inf_tecnica/Notas%20de%20aplicacion/PCBs/IPC-2221(L).pdf

(You're not supposed to though.. IPC charge for their standards!)

Thanks to those who've quoted me text from their copies of the
standards.. I've the info I was looking for.

Basically they suggest web width be about 60% of the minimum acceptable
land diameter for the part.. DIVIDED by the number of webs in use.

They also stipulate how the webs should SHRINK if you make the pad
bigger than the minimum allowable size, and give a limit for the total
width of web over all planes.

What they don't say is how to calculate the clearance (obviously
important for thermal conductivity to the plane), nor whether there is
any special relationship between clearance and web width. (Implied not,
since they provide explicit guidelines for web width).

Clearly attributes are the way forward - let the user fiddle.. but I
would also like to see it possible for a thermal to be recognised as
"default" in some way.. and scale with other geometry. Perhaps this is
me just making things more complex than necessary.

The good old-fashioned +,x thermals with no rounding are the nicest in
my opinion ;)

I'm told by an industry source that some fab's (high end ones perhaps?),
don't always produce an exact 1:1 match between the design geometry you
send them and what they produce. THEY will know how to do thermals in a
way which suits THEIR soldering process, so they may modify things in
their own CAD software. Conveying the _intent_ of the design is what you
need to do.

For the cheap (or DIY) end of the fab market we often serve - I think we
should assume that we get what our design files ask for, even if it is

For my money,

Fully parametrised thermals will basically boil down to arbitrary
polygons built up from things we can teach PCB how to do.. such as webs.

I want to see support for arbitrary web count, web geometry and web
positioning.. (How this works for square.. I don't know).

Ideally, square pads would connect coming in at the corner of the square
pad, or employ a tear-drop for extra robustness against drill breakout.

Since this could get complex quickly - I wonder if we ought to at this
stage start doing these by reference.. include the thermal design ONCE,
and reference it by name on pads which use it.

Best wishes,

Peter Clifton

Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,

Tel: +44 (0)7729 980173 - (No signal in the lab!)
Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me)

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