Re: gEDA-user: Can't route

[Steve Meier <smeier@xxxxxxxxxxxxxxxxxxx>]

Hmmm,

This is an area that writting some code could be very usefull. How about
a limited auto router that takes the bga io traces out just past the
nearest edge?

Steve Meier



On Sat, 2007-07-14 at 11:41 -0700, Steve Meier wrote:
> Ben,
> 
> I think you have the correct idea.
> 
> I would hand route the traces from under the fpga and perhaps around the
> other major periferal chips. Then i would sort out the rats nest by
> swapping io pins. After that I would let the autorouter take a shot at
> the layout.
> 
> As a explination/warning about the bga image and via in pads. First via
> in pad isn't necessary you can have vias off to the side of each pad but
> this costs you the use of the top layer. Second, these vias can behave
> like chimnies and transport heat up through them wicking the solder back
> down. To avoid this the assembly shop/ fab shop coated the back side
> with an epoxy ressin. Always always always review your design with both
> the fab shop and assembly shop before starting manufacturing. Third,
> these boards have to be flat otherwise the bga won't adhear to the pads
> or will puddle shorting pads... probably will do both.
> 
> One last note, this was done on a much earlier version of pcb and was
> only an 8 layer board.
> 
> Steve Meier
> 
> 
> 
> 
> 
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> geda-user@xxxxxxxxxxxxxx
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