[Author Prev][Author Next][Thread Prev][Thread Next][Author Index][Thread Index]
Re: gEDA-user: Gnetlist -g PCB
On Jun 29, 2008, at 4:49 AM, Wojciech Kazubski wrote:
> This is a bug in the library. The symbol pot-1.sym should have all
> pins declared as passive instead of input/output.
No, it's a conceptual problem with DRC. It is perfectly reasonable to
consider the pins on a pot as inputs or outputs. The classification
depends on the *application*, not on the *part*, so it is insane to
be classifying the pins on this kind of part.
Pintypes are only sensible in a narrow class of flows: outside of
pure digital circuits using a single technology they don't make
sense. It is not surprising that they are confusing to newbies: there
is no way to make sense of them in general! Yet we grossly oversell
drc2, spamming every user of gnetlist with "Remember to check that
your schematic has no errors using the drc2 backend", an exhortation
that grossly exaggerates drc2's utility. It certainly doesn't "check
that the schematic has no errors": it mostly strains out gnats and
swallows camels.
> There should be "pintype=pas" attribute for each pin instead of
> "pintype=io".
> It is probably safe to ignore the warning.
The basic DRC should be much more limited. Right now, it's pretty
useless: it complains about a host of non problems. Its purpose
should be to detect problems in the translation from graphics to
netlists, not to try to outguess the engineering behind the graphics.
You can't do applied physics with clerical methods. It is not sane to
attempt to do so.
>
> The same bug is in pot2.sym
>
>> I am a newbie using PCB. I created a schematic with footprints,
>> values, etc.
>>
>> I used gnetlist -g drc2 and had one warning.
>>
>> WARNING: Pin(s) with pintype 'input/output': R101:3
>> are connected by net 'GND'
>> to pin(s) with pintype 'power': U101:7
>>
>> I used gsch2pcb and then pcb. I recieved an error about pins
>> numbered
>> 'n1' and 'n2.
>>
> Wojciech Kazubski
>> I used gnetlist -g PCB and saw the n1 and n2 pin numbers in
>> output.net. I also see pins like n+ and n-.
>>
>> output.net is below. I can post the schematic, if it will help.
>>
>> In pcb, none of the resistors or capacitors are connected with the
>> ratsnest.
>>
>> What am I doing wrong?
>>
>> tomdean
>>
>> G_CS J107-4 J104-15
>> ADC6 J106-6 J104-6
>> R/W J105-5 J104-9
>> ADC4 J106-2 J104-4
>> ADC5 J106-4 J104-3
>> ADC2 R104-n2 R103-n1 J104-2
>> unnamed_net2 R102-n1 R101-1
>> unnamed_net1 J105-3 R101-2
>> DAT7 J105-14 U101-13
>> DAT6 J105-13 U101-12
>> DAT5 J105-12 U101-11
>> DAT4 J105-11 U101-10
>> DAT3 J105-10 U101-6
>> DAT2 J105-9 U101-5
>> DAT1 J105-8 U101-4
>> DAT0 J105-7 U101-3
>> +12V R104-n1 J103-15
>> R_PULSE J108-3 J103-6
>> R_INT J108-2 J103-7
>> E1 J105-6 J103-8
>> LCD_CS U101-2 J103-9
>> RS J105-4 J103-5
>> TXD J104-14 J102-4
>> RXD J104-13 J102-3
>> SCK J107-3 U101-8 J103-12 J101-6
>> A_CS J104-10 J101-7
>> MOSI J107-6 U101-1 J103-10 J101-5
>> Vcc J108-1 C105-n+ C103-n+ J107-1 C101-n+ J105-1 J104-7 R102-
>> n2 U101-14 U101-9 J103-3 C104-n- J102-2 C102-n+ J101-1
>> MISO J107-5 J103-11 J101-4
>> IO J108-4 J104-16 J104-11 J104-12 J104-5 J104-1 J103-14
>> J103-1 J103-2 J102-6 J102-7 J102-9 J102-10 J101-8 J101-3
>> GND J108-5 C105-n- R103-n2 C103-n- J107-2 J106-5 J106-1 J106-3
>> C101-n- J105-2 J104-8 R101-3 U101-7 J103-16 J103-13 J103-4 J102-8
>> J102-5 C104-n+ J102-1 C102-n- J101-2
>>
>>
>> _______________________________________________
>> geda-user mailing list
>> geda-user@xxxxxxxxxxxxxx
>> http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
>
>
>
> _______________________________________________
> geda-user mailing list
> geda-user@xxxxxxxxxxxxxx
> http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
John Doty Noqsi Aerospace, Ltd.
http://www.noqsi.com/
jpd@xxxxxxxxx
_______________________________________________
geda-user mailing list
geda-user@xxxxxxxxxxxxxx
http://www.seul.org/cgi-bin/mailman/listinfo/geda-user