Re: gEDA-user: High speed decoupling (was: Simulation of ceramic capacitors, pairs and groups)

[David Hart <dhart155@xxxxxxxxxxx>]

On Tue, 2006-03-07 at 09:53 +0000, Evan Lavelle wrote:
> Karel Kulhavy wrote:
> > I have made a simulation to see how the capacitor pairs and groups actually
> > behave:
> > http://ronja.twibright.com/technotes/cercap.php
> 
> Thanks; very nice. However, I'm not sure that the numbers are right. The 
> figure shows that a 10nF//100nF pair gives a low impedance (< ~1 Ohm) 
> over a range of about 1.5MHz to 200MHz, which would make it ideal for 
> decoupling high speed parts. I compared this with an old Cypress HOTLink 
> app note where 22nF//100nF pairs were analysed, and the author's opinion 
> was that this wasn't suitable for high-speed decoupling, because of a 
> high resonant peak (~ 100 Ohm) at 150MHz. Your results show a peak of 
> about 0.4 Ohm (at 30MHz), so are much better.
> 
> The differences are:
> 
> 1) The appnote assumes real parasitics of 5nH for a surface-mounted MLC 
> cap, compared to your manufacturer's figures of 1.6 - 1.9nH. Your 
> figures also seem to be for leaded caps: the SM figures are even lower.
> 
> 2) The appnote gives a lower ESR of about 30 mOhm, while you're using 
> 100 - 150 mOhm. The peak height varies inversely with the ESR.
> 
> Anyone have any other thoughts on real in-system ESL and ESR numbers?

For an insightful discussion of this issue, you may want to visit the
"Managing Noise and Ground in Precision Analog System Applications"
on-line webinar at:
http://w.on24.com/r.htm?e=19853&s=1&k=A8EB366553A7E55131C3E0B733E2654E

This presentation by Bonnie Baker (from TI) starts with a poorly
designed analog board and proceeds through the steps to clean it up.
Mostly generalizations, but presents everything in a clear manner. And,
they remind you that digital is nothing but a subset of analog :)

Dave Hart...