Dear all,
A while back I posted a question about a feature in pcb whereby vias
spontaneously appeared in pads of my components. It happened to me
again, and I found a way to reliably cause it.
It seems to happen when rats are optimized on a board with some
nodes connected to a plane.
Attached is a ".piz" file (which can be renamed to ".zip" and opened
as usual). If you open the file: "./possible-issue/test/issue.pcb"
with pcb, and press "o" to optimise rats nests. On my system this
causes a via to appear in C401. Undo works, so I wonder if this is an
expected behaviour?
I am using PCB version 20080202, on Kubuntu.
cat /etc/issue:
Ubuntu 8.04.2 \n \l
uname -a
Linux andrew-laptop 2.6.24-23-generic #1 SMP Thu Nov 27 18:44:42 UTC
2008 i686 GNU/Linux
Does anyone know what might cause this and how to avoid it?
Kind Regards
Andrew
--
╒═════════════════════════════════════════════╕
Andrew Whyte MEng CEng
Electronics & Software Design Engineer
paramita ltd
╞═════════════════════════════════════════════╡
@ - aw@xxxxxxxxxxxxxxxxxxxxxxxx
⌨ - www.paramita-electronics.com
☎ - +44 (0) 79 81 01 61 85
╘═════════════════════════════════════════════╛
paramita ltd, is a limited company registered in England and Wales.
Registered number: 6631289. Registered office: 788-790 Finchley Road,
London, NW11 7TJ (please use trading address for normal correspondence)
Attachment:
possible-issue.piz
Description: Binary data
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