Re: gEDA-user: On integrating simulator in gschem

[John Doty <jpd@xxxxxxxxx>]

On Mar 17, 2010, at 8:34 AM, John Doty wrote:

> 
> On Mar 17, 2010, at 6:30 AM, Steven Michalske wrote:
> 
>> On Mar 16, 2010, at 2:00 PM, John Doty wrote:
>> 
>>> 
>>> On Mar 17, 2010, at 5:54 AM, Ivan Stankovic wrote:
>>> 
>>>> While we're at it, was there a consensus on using verilog-ams as the format
>>>> of choice for Al's translation system?
>>> 
>>> The format has to have a way to represent graphics.
>>> 
>> How about embedded SVG?
> 
> The problem there is that it's physically meaningless. No distinction, for example, between nets and mere graphical lines.

Oh, and of course another problem is that there's no standard way to embed it in Verilog. But in those cases where it matters, we have a well defined way to embed Verilog in .sch files, using attributes. So by making Verilog the exchange format, we would substitute a difficult to parse inflexible format for something more suitable that we're already using...

John Doty              Noqsi Aerospace, Ltd.
http://www.noqsi.com/
jpd@xxxxxxxxx




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