[Author Prev][Author Next][Thread Prev][Thread Next][Author Index][Thread Index]

Re: gEDA-user: cell0 and cell1 references in EDIF file?



Harold D. Skank wrote:
People,

I need some help here!  I'm using iverilog to provide simulation
capability, and to generate an EDIF design file to submit to a Lattice
Semiconductor package for place and route.  Everything seems to go OK up
to the submission of the EDIF file, at which point the Lattice package
doesn't seem to understand reference to "cell0" and "cell1".  Frankly,
looking at the EDIF file, I don't understand them either.

cell0 and cell1 are output-only constant value devices. They are to drive constant 0 or 1 to the input of something else. The cell types are completely defined in the EDIF you posted. If Lattice tools can't handle it, they need to be slapped around until they explain why they don't support LPM_CONSTANT cells.


-- Steve Williams "The woods are lovely, dark and deep. steve at icarus.com But I have promises to keep, http://www.icarus.com and lines to code before I sleep, http://www.picturel.com And lines to code before I sleep."