Re: gEDA-user: VHDL Compiler

[Alex Perry <alex.perry@qm.com>]

Okokok ... I'll join in.  8-)

> Bill Cox wrote:
> > I gree.  In general both Verilog and VHDL are nearly equivalent from the
> > end-user perspective. [...] A simple datapoint:  My structural
> > Verilog reader is 5183 lines of hand written C code.  My structural VHDL
> > reader is 9744.

I'm a subscriber of the standard joke that I use Verilog because
I can't type fast enough to be productive in VHDL.  However, I
see this as a fault of the authors of simulators and synthesizers
not anything to do with the feature set of language itself.

What I mean by this is that VHDL, as a language, is designed to be
written as though it is procedural and has a single point of execution.
Because the synthesizers do a really bad job of converting the obvious
way of writing code into the obvious RTL, the author spends a lot of
lines of source explicitly writing out the RTL version of the code.
The longer file is a haven for stupid bugs and takes longer to read.

Stephen Williams wrote:
> Personally, I would not choose to be so vociferous in an attack
> of VHDL. VHDL advocates would point to that the standard is clear
> on many things that Verilog is vague about. This is especially
> true of simulation scheduling.

That's true as literally written.  However, I've had more problems with
partially implemented bits of VHDL standard than I do with Verilog.
I find that a "problem" with the standard implementation has a tendency
to become a "sneaky bug" in the code because the author and the
simulator
are using different interpretations and disagree as to what should
happen.

> My biases are well known, but *both* LRMs are freaky and buggy
> so I'm not going to complain about VHDL while I'm busy fixing
> Verilog.

Don't stop, please.  Icarus has a "do what I wrote" approach, which is
greatly preferred over "do what the simulator author thought I wanted".
8-)
	Alex.

PS. It has been suggested to me that the last statement should really be
"do what the marketing droid told the software engineer was a good idea"
as a justification for the feature set and to absolve the poor engineer.