Re: gEDA-user: How to deal with single/dual parts?

[Peter Clifton <pcjc2@xxxxxxxxx>]

On Wed, 2009-11-18 at 14:36 -0700, John Doty wrote:
> On Nov 18, 2009, at 1:23 PM, Peter Clifton wrote:
> 
> > On Wed, 2009-11-18 at 10:56 -0700, John Doty wrote:
> >> On Nov 18, 2009, at 9:11 AM, Peter Clifton wrote:
> >
> >> So I think what you're saying is that you like the idea of a tool
> >> that converts (hierarchical .sch)->(flat .sch).
> >
> > That can't work if there isn't some extra information input somewhere.
> 
> You can *flatten* without extra info. You can't go all the way to a  
> concrete implementation without extra info.

Fair point - although it would of course be nice if I could do this in a
way where I could still modify the original diagram(s) to change the
design.

I ran into this with a design once before.. the board assy. people
insisted on flat refdes, but my design was highly hierarchical with
schematic re-use.

(Actually it was a mix.. some hierarchy levels used makefiles to make
slightly modified versions with adjusted refdes).

My hacky solution was to patch gnetlist (locally) to take a mapping
file. My X1/X2/U1 gets turned into U99 as gnetlist loads the design.
gsch2pcb, PCB, and the output netlist only ever exist in terms of the
mapped refdes.

(PCB provided me a means to create the basis of a mapping file from its
"renumber" facility)

The royal pain is of course, that to debug the schematic you had to
figure out where you are in the hierarchy, then look to the mapping file
to figure out the board level refdes. Or in reverse.. from board level
refdes to hierarchical one to look up the schematic.

As it stands, it would be impossible to back-annotate new refdes onto
such a design without making separate copies for each re-used piece of
hierarchy. That has its obvious disadvantages.

Hierarchical schematics and flat layout don't mix well, as far as I can
tell.

[snip]

> Me, too. It gets messy, though, when dealing with chips that have  
> lots of channels, chips that have incommensurate slot counts, or  
> cases where you don't use all of the channels in each block.


Yep.. slotting, hierarchy.. flattening.. gate swapping.. it all gets
very messy.




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