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Re: gEDA-user: gEDA and PCB ------



Well (my understanding) PCB uses a data object called flags. The flags are esentially a 32bit (length ?) unsigned integer. Some of the bits in the flag are used to determine for each layer if a via is passing through a metal polygon. Others of the flags determine if the via has a thermal connecting it to the polygon. So if this structure was continued a 64 layer version would require 128 bits for the layers + the other 16 flags. FOr buiried vias the via would have to have some way of knowing if it passed through a layer at all.

Steve Meier


Bob Paddock wrote:

On Thursday 07 October 2004 10:37 pm, DJ Delorie wrote:

8 layer board which really isn't enough.... time to get PCB to have a
reasonable number of layers... yes yes i know it will be a lot of work.

We were just talking about this yesterday. I have some ideas about
implementing it. I think the tricky part is deciding how many layers
to allow, or if it needs to be dynamic, and if so, how do you adjust
the number of layers?

The is admittedly a response based on no knowledge of the internals of PCB.

If a board is built in layers there are a few layers that are always unique,
such as the silk screen, top paste, bottom paste etc. All other layers will
be a trace layer.

You are never going to have an internal paste layer for example.

So after handling the unique layers does not unlimited trance layers fall out for 'free'?