Re: gEDA-user: VeriWell now on SourceForge

[Evan Lavelle <eml-geda@xxxxxxxxxxx>]

Karel Kulhavy wrote:

> What is better, Verilog or VHDL?

There is, as far as I know, no English word that describes this class of 
question.

If there was a word, it would mean this:

"A vexatious question of which the meaning is unknowable unless the 
enquirer already knows the answer; of which the answerer is likely to 
have even less knowledge than the enquirer; to which the answer is 
almost invariably incorrect; and of which the answer, in the unlikely 
circumstance that it was actually correct, would be of no practical 
value anyway."

Now, I suspect that there may be a Germanic (or Slavonic?) word that 
describes all this perfectly, and which we could steal and put in the 
dictionary next to schadenfreude. Over to you, Karel.