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Re: gEDA-user: Icarus verilog Synthesis



   I am looking for a book that for example describes how a
   for/while/repeat/forever and other verilog behavioral constructs are
   converted to multiplexors/and gates etc.


For FPGA work, I am unaware of any engine that can synthesize those constructs.

If you read through the XST manual from Xilinx (just for an example), I am pretty sure they tell you what can and cannot be synthesized. The commands you just listed work well for test benches or other verification code (and simulation too) but are probably not appropriate for fpga level design.

Maybe VLSI is different - but I have no experience with that.




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