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Re: gEDA-user: 3 questions on a 4 layer board



Three thoughts.

1) Noise on power planes that isn't filtered from circuits that have
large gain in order to make very small signals big. Common types of
noise include digital clocks and switching power supplies. Noise on a
power plane gets added to the small signal and the circuits output is
something along the order of out = (small signal + noise) * gain. I
can't see any way to make the out signal representative of the small
input other then to reduce the noise propigating into the gain stage. So
filter the power supplies and filter the power just as it enters the
gain stages.

2) Signal return paths. Singled ended circuits use the ground plane (or
virtual ground plane) as a return path. Ground planes aren't the ideal
zero impedence infinite supply of electrons. Your power plane isn't
ideal either. If your input signal is large this isn't an issue if your
input is small this is a hudge issue. Also your ground and power planes
aren't really planes they have holes and other disturbances of the
"force" within them. The return path thus can distort or add noise to a
signal. Again for a set amount of "nosie" the smaller the signal and the
more gain the larger the issue.

3) For matched traces a ground plane is a power plane. The fact that a
plane is at a particular voltage isn't as critical to its functioning as
the plane a trace is being referenced. Vendors typicaly help you select
trace width and dialectric thickness to help you reach a particular
impedence (frequency) goal. the include in the calculation the type of
material being used (used to be fr4 but now is something elese for rohs
compliance). Vendors also have to take into account balencing the
layers, thickness and other dark magic such that the board doesn't warp
and then those fine pitch bga balls puddle. Not pretty. The common noise
of clocks, power supply switching and other signals will apear on both
ground and elevated power planes.

There is a reason for differential signals

Steve Meier


Rick Collins wrote:
> At 04:33 PM 4/29/2008, you wrote:
>   
>> Dan McMahill wrote:
>>     
>>> If my traces were carrying ground referenced analog signals I wouldn't
>>> want the power plane being my "ground" plane.
>>>
>>> And yes, I've seen a real life case with some rather frustrating
>>> behavior that the correct stackup totally fixed.  There was a moment of
>>> clarity when a bypass cap way on the other end of the board made a much
>>> larger than expected difference.
>>>       
>> Would you mind elaborating on this?  I could imagine a scenario where
>> the power plane could be a source of AC noise - especially if components
>> aren't bypassed adequately.  The AC noise could then couple to the
>> signal traces in its quest to complete a low impedance circuit.  Is this
>> what you observed, or am I way off?
>>
>> -Ethan
>>     
>
>
> I don't want to come off as argumentative, but if you both think 
> about what has been said here, you can see the fallacy.  If the 
> frequency of the noise is such that it can easily couple into a 
> signal trace, then that same noise would be well decoupled between 
> the power and ground planes and so would not be present to any 
> significant degree.  The decoupling would not be through caps as it 
> would be from the very high frequency capacitance of the planes themselves.
>
> Ground or power noise in circuits is nearly always due to 
> ground/power bounce and only affects the signals in or out of the 
> chip that has the "bounce" problem.  Even if a board has inadequate 
> decoupling of the power plane, that noise is not going to 
> significantly couple into signals.  Of course, because of the 
> ground/power bounce on the chip making the noise, its signals will 
> look like they are coupled to the noise because they are... but not 
> directly from the power plane to the signal traces, through the power 
> pins on the chip.
>
> Rick
>
> Arius - A Signal Processing Solutions Company
> Specializing in DSP and FPGA design      URL http://www.arius.com
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