On Fri, Apr 8, 2011 at 11:39 AM, rickman<gnuarm.geda@xxxxxxxxx> wrote:
On 4/7/2011 1:13 PM, Stephan Boettcher wrote:
rickman<gnuarm.geda@xxxxxxxxx> writes:
I have to say I am philosophically opposed to any feature that allows
a design to pass DRC when the layout differs from the schematic.
Just to get the terminology right:
DRC has no business to care about the schematics at all. There shall be
a tool to check if the layout implements the schematics netlist, but
that is a different issue.
PCB implements this distiction properly. DRC checks consider coper
structures as layed out when evaluating the rules, without regard to the
netlist.
The Rat's-nest (O-key) ignores DRC rules when checking connectivity.
Ok, if you want to be pedantic the net list is not the schematic, but if
the netlist differs from the schematic, then you have another problem.
DRC is a part of my design process which includes a verification that the
layout matches the net list. In fact, my number 1 "design rule" to be
checked is that they match. What button I push to get the tool to do my
required design rule checking is irrelevant. It is just a tool and does not
define my process.
So my point is that adding an attribute to any copper to tell the tool to
ignore the connectivity violates my idea of design rule checking.
Rick
Rick, your idea about DRC and the pureness of connectivity is wrong.
Connectivity is insufficient for real world designs, which is the
point of all this discussion. It's possible to have a design with
perfect connectivity that doesn't work. Any analog or RF design, and
a lot of high-speed digital designs, require a lot more attention than
getting connectivity right.
So the desire to tag certain nets / connections as controlled
impedance, no DRC, equal trace length, etc.
Regards,
Mark
markrages@gmail