Re: gEDA-user: Yet another netlister

[John Doty <jpd@xxxxxxxxx>]

On Aug 10, 2009, at 9:46 AM, A.Burinskiy wrote:

> John,
>
> It is not a big deal to write a parser. The big deal is creating
> meaningful language.

Don't need to create a language, plenty of those around. Just need to  
choose one that won't frighten the timid. And need a set of functions.

> Flexible enough, yet not overloaded with features,
> transparent and logical, understandable not only for designer, but to
> end user too. My problem is that I'm newbee for the PCB. Just started
> using commercial tool. And already very "happy" with that....
> Over years I was busy with IC design and IC layouts. My last PCB  
> design
> was shortly after graduation. So, I do have little knowledge of PCB
> community needs.

Look at what the existing gnetlist back ends do.

> I wrote netlister for IC community (or beeing precise
> - for me). If you could give me a hint on lang. semantic that would be
> usefull, I will gladly write parser.

What, deprive me of the fun part? ;-)

> I think that gnetlist
> implementation is too heavy and not flexible enough.

It needs refactoring. But it's still radically flexible as is.

> It depends too much
> on "device=" attr.

Hardly at all. There aren't even any firm conventions on what to put  
there. Now the spice-sdb back end does look at device= by default,  
and that can cause some problems, but Stuart put in the --nomunge  
option at my request. Thanks, Stuart!

> For example, to determine whether something is
> netlistable or not it is enough to see whether it has isDef 
> ("refdes") &&
> ("device"!="none"). /*In reality I do some more checks*/, rather then
> writing semantic for each individual device. Special case - in/out
> terminals of subcircuit, that should parse there names to subcircuit
> nets... etc (One of the reason I decided to hardcode backend).
> Attributes could be filtered out, rather then verified against valid
> list one by one, as its done on gnetlist. All this little things  
> allows
> to avoid extensive backend programming, when introducing new very  
> simple
> device cause Guile/Schem study....

You're confusing things that violate your aesthetic preferences with  
barriers. "Get with the program".

>
>   Lets work on some universal netlister that will be accepted by  
> both IC
> and PCB communities?

It's called gnetlist. If tired old grey haired astrophysicist like me  
can design both PCB's and IC's with it, shouldn't real designers be  
able to do that too?

John Doty              Noqsi Aerospace, Ltd.
http://www.noqsi.com/
jpd@xxxxxxxxx




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