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Re: gEDA-user: Foss-pcb Proposed plan from CERN



On Wed, 2011-08-24 at 01:42 +0200, Kai-Martin Knaak wrote:
> Peter Clifton wrote:
> 
> > Even conversion of old legacy Altium designs could be done given access
>                      ^^^^^^^^^^^^^^^^^
> Is this a serious restriction? 
> Would it be possible for a user of a current altium license to export 
> to this "old legacy" format?

Sorry, I was meaning "legacy" as in "their old designs". It was a
current file-format I was working on. I didn't bother with their old
ACSII format, as not so many designs / versions can export it.

> A transition path from altium to geda would be huge!

I think so. Actually, a path back from gEDA to Altium would probably
give as much of a boost in confidence for people to try gEDA it as well.
(Assuming an incumbent Altium user).

The main sticking points for people converting so far, seem to be:

1. Confidence in the tool reliability and feature set
2. Taking their existing footprint / symbol libraries with them to gEDA
3. (Can't recall a No. 3).

Certainly migration of existing designs was not a huge concern to the
people I've spoken too, since at the early transition stage, I would
expect people to keep a copy of Altium around.

For converting "legacy" designs, an import from gerber might be more
generally useful to our user base, and doesn't require decyphering
unknown file formats. Admittedly this looses footprint information, but
perhaps that isn't always an issue.

> How far did you advance on this road?

Unpacking the container format, separating out individual footprints
from a library, identifying most of the binary record types within those
footprints. It would take time and examples to verify we can know the
meaning of each field in the format, but that is only a time + effort
job.

I had similar tentative progress with the PCB format its self, and
verified that it would be a similar job to parse the schematic and
schematic symbol contents.

I'll get hold of the guys I was working for and see if I can make a
preliminary release of the findings made. (This was all done in the
support of gEDA anyway).

> ---<)kaimartin(>---
> 
> PS: Why did none of my todays posts hit the list, yet? (While others seem 
> to have no problem to get through within minutes)

-- 
Peter Clifton

Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA

Tel: +44 (0)7729 980173 - (No signal in the lab!)
Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me)

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