Re: gEDA-user: uEDA .. was .. Re: Heavy Symbols and such

[Steve Meier <smeier@xxxxxxxxxxxxxxxxxxx>]

For answers #1, #2 and #3 That the point of having a scripting backend?
I also refuse to become fluent in klingon but I am not opposed to having
other who are interested work on traslators. Same goes for xml or any
other language. The test of the quality of the universiality of the
libgeda or "non-stock" libgeda formats and the scripting language
interface is how well do they export into the syntaxt of other tools be
it pcb, spice, ngspice, icarus, gnucap et al. opps uEDA no reason to be
exclusive.

So I would like to break the issue down too.

Is my proposed extension of scheme capable of importing other
interesting formats? (i think not but I haven't enough info yet)

What extensions of scheme are needed to manipulat the libgeda or my
non-stock version for generating netlists and boms and?

What should he extension of scheme be inorder to support exporting of
the netlist to support other programs?

Extra points for those who can say with some specificity that it needs
the following function with the following input so that i can out put
the following syntaxt.

Standard points who mearly say given the following schematic and
associated files which are some how connected to the symbols of the
schematic I expect to see the following net list with a specific laguage
dependent out put example.

SDB has already earned points in this contest by providing spice
examples both as inputs and as outputs. A good starting point would be
to expand upon these.

Thanks,

Steve Meier




al davis wrote:
> On Thursday 06 December 2007, Peter Clifton wrote:
>   
>> XML can be an expressive "format" if you use it right (define
>> a good DTD to use for your application), so I'm not saying
>> VHDL / Verilog are the only solutions.
>>     
>
> An XML based format could have an "advantage" (in quotes because 
> whether it is an advantage or not is a matter of opinion) that 
> it is equally foreign to all.  VHDL and Verilog are likely to 
> be supported directly by simulation and synthesis tools.
>
>   
>> Are the standards for both (or either) freely available,
>> without paying money? That would be a real selling point for
>> me.
>>     
>
> VHDL-AMS - for a price.
> Verilog-AMS - free download. ("abridged" but complete enough) 
> http://designers-guide.org/VerilogAMS/VlogAMS-2.2-pub.pdf
>
>   
>> SPICE.. is there a standard?
>>     
>
> Answer #1:
> No.
>
> Answer #2:
> Yes, there are lots of them, all different.
>
> Practical answer:
> There is a subset that is so common it can be considered to be 
> standard.  It is essentially the format of Spice-2g6, without 
> POLY.
>
>
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>   



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