Re: gEDA-user: European symbols?

[Stephan Boettcher <boettcher@xxxxxxxxxxxxxxxxxx>]

"Johnny Rosenberg" <gurus.knugum@xxxxxxxxx> writes:

> Den 2010-12-31 16:31:42 skrev Stephan Boettcher
> <boettcher@xxxxxxxxxxxxxxxxxx>:
>
>> "Johnny Rosenberg" <gurus.knugum@xxxxxxxxx> writes:
>>
>>>> No.  That's the wrong conclusion.
>>>>
>>>
>>> Well, we'll see what will happen. I am still not 100% sure how to
>>> create symbols in the first place, so I guess things will move very
>>> slowly to  begin withâ
>>
>> Maybe your time is better invested by using a small FPGA for whatever
>> you want to build, and learn Verilog to express the logic.
>
> Hmâ searched the web a bit for Verilog and FPGA, so now I know a
> little (very little) about it, at least. Seems like I already have a
> Verilog  compiler installed on my system (iverilog) and there are
> manpages for it.  Not sure, however, how to connect the FPGA thing to
> my computer to program  it (I'm on Ubuntu 10.10). What do I need to do
> that? Not that I intend to  do it at the moment, just curious.

For our DAQ systems we recently use an ARM7 chip LPC2148 as frontend to
an Altera Cyclon 3 FPGA (144pins, 3C25).  This is not the smallest
project size I can think off.  The boards are 106x70 mmÂ.  The ARM7 has
a USB interface.  The FPGA then drives a set of ADCs, filters the data,
triggers, and formats the data through some FIFOs to the ARM7 and from
there either via USB to the host or via SPI on a uSDcard.  On power up,
the ARM7 reads the FPGA configuration from a flash and feeds it to the
FPGA (passive serial mode).

Previusly, we had a Cyclon2 chip connected via a parallel port.  You
need four pins to program an Altera in passive serial mode (SCLK, DATA,
nCONFIG, CONF_DONE). Or use JTAG.  With the parallel port I considered
writing a kernel driver, but we still toggle the bits from user space,
three syscalls ber bit, but that adds up to only a few tens of seconds.

And when all is debugged and supposed to work without a computer, there
are little EEPROM chips that can feed the configuration into the FPGA.
I did not do that for 10 years, so I don't know how easy it is to get
those burned.

So, it really depends how complex your circuit is, and how it's going to
be used in the end.  

But the effort to design populate and debug an eurocard full of 74xx is
daunting too.

>> Depends how much fun can have from learning such stuff.  A deadline does
>> not seem to be your problem.
>
> Well, learning is always fun, but there is so much else I want to do
> that is closer to my main interest (as a musician and ârecording
> engineerâ) 

See, it depends.  How many 74xx parts will your circuit need?

> so even if there is no deadline, I can't spend all my time on it
> anyway.

Sure, else you'd not say "... will move very slowly to  begin withâ"

> And I have a wifeâ :D

Oh yes, that is a drain on resources ..

Happy new year!

-- 
Stephan



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