Re: gEDA-user: Which are the biggest looking gEDA warts?

[DJ Delorie <dj@xxxxxxxxxxx>]

> 	The fact that the development pace is so fast that the last
> 	snapshot of PCB is comparatively unusable vs the latest CVS.

Sorry, we'll try to code slower next time ;-)

Seriously, though, the pcb snapshot process tends to exasperate this.
We take snapshots after the code settles and is "known good", usually
just before we start a run on adding stuff.

> 	The lack of guidance at build time as to whether PCB should be
> 	used with GTK or Lesstif.

We're still not sure ourselves.  I think we prefer gtk over lesstif,
if both are available.  They're not always both available.

> 	The DRC report interface is terrible.

We've talked about alternatives recently, there are certainly
opportunities for people to get involved here.

> 	Rats don't move when you drag a group.  And sometimes they don't
> 	move in other situations.  Having seen the internals now, I can
> 	see why it's a crapshoot.

We've talked about tagging everything with which net it's part of,
which would be the first step in addressing these kinds of things.

> 	The default layer stackup does not match the physical reality.

IIRC most people get a "default" from gsch2pcb, not from pcb itself.

> 	I was very confused when I loaded a 4 layer board and I could
> 	see solder side lines between the component side lines and an
> 	inner plane!

Note that pcb allows you to display the layers in whatever order you
want (most recently used ones on top), else you'd never be able to
edit "hidden" internal signal layers.

We've talked about making the layer list BE the stackup, but there's
some internal redesign needed before that can happen too.

> 	There are lots of DRC parameters that PCB doesn't know.

I've imagined a "super drc" that has more things.

> 	The whole via/thermal/plane thing.

:-)


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