Re: gEDA-user: GL pcb bugs and a question re the log/library window, gerber outline output

[Denis Grelich <denisg@xxxxxxxxxxxxx>]

I have set the fullpoly flag manually, which wasn't a big deal since I
had to do a lot of manual work in the file (especially when it comes to
arcs -- I was even thinking about writing a patch to be able to work
with arcs sensibly with the GUI, maybe I'll still look into it even
though the board is finished.)
Without fullpoly, I wouldn't get the plane filled with GND, but only
some small isle.

On Wed, 18 Feb 2009 12:55:32 +0000
Peter Clifton <pcjc2@xxxxxxxxx> wrote:

> On Wed, 2009-02-18 at 09:32 +0100, Denis Grelich wrote:
> > Hello, thanks for looking into it! I'll try the newest git head
> > later today. Please note that I have constructed some tast cases
> > too and attached them to the bug tickets.
> 
> Btw.. how did the "fullpoly" flag get set on some polygons in your
> design? That flag breaks connectivity checking, and makes the PCB+GL
> branch hit slow rendering paths. (Could speed it up, just haven't
> yet).
> 
> There is a GUI option "Settings->New polygons are full ones", but it
> doesn't seem to be hooked up - certainly not on the PCB+GL build, and
> I don't remember disabling it.
> 
> I've attached a small example of how the connectivity scanning is
> broken with "fullpoly". Press "f" to highlight connections from each
> via in turn, and see the damage. Also, note that PCB ignores the
> resurrected piece of the polygon in many cases, such as pressing "f"
> on it.
> 
> The code I was writing to allow full polygon pours is intended to
> allow the equivalent of "fullpoly" whilst allowing proper connectivity
> scanning. You'd just have to switch off island removal, and you get
> the same behaviour.
> 
> Best wishes,
> 
> -- 
> Peter Clifton
> 
> Electrical Engineering Division,
> Engineering Department,
> University of Cambridge,
> 9, JJ Thomson Avenue,
> Cambridge
> CB3 0FA
> 
> Tel: +44 (0)7729 980173 - (No signal in the lab!)
> 


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