Re: gEDA-user: Insufficient clearance of pad inside polygon

[Steve Meier <smeier@xxxxxxxxxxxxxxxxxxx>]

Wouldn't you like to know the moment you short two nets rather then at
some later point that two nets are shorted?

Steve Meier

Steve Meier wrote:
>DJ,
>
>Stop, you are causing me to have to think again!
>
>Ok, one of the drc tests, apparently, is to test if a land pattern
>conforms to the design rules (e.g. silk screen thickness) why doesn't
>the drc run every time a land pattern is dropped into a layout? Is it
>not better to be proactive then reactive?
>
>Steve M.
>
>DJ Delorie wrote:
>  
>>>Where is the button for drawing the schematic for me in the first place?
>>>   
>>>      
>>:-)
>>
>>However, his request makes sense.  I didn't disagree with that part, I
>>was just asking if a simpler/faster solution would be an acceptable
>>compromise.
>>
>>Consider spell checkers, for example.  They *all* offer fix-on-the-fly
>>of various sorts, and I think PCB should offer something similar.
>>It's a *real* pain to keep track of what needs to be fixed, and go
>>back and fix them.  Either a fix-on-the-fly feature needs to be added,
>>or a DRC layer or overlay needs to be added which tags all the errors
>>and lets you remove tags as you fix stuff.
>>
>>But making arbitrary changes from inside DRC is harder than an
>>independent option that fixes one type of reasonably safe DRC problem.
>>
>> 
>>    
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