[Author Prev][Author Next][Thread Prev][Thread Next][Author Index][Thread Index]
Re: gEDA-user: Power (and other non-graphical) pins
On Tue, Jan 13, 2009 at 8:47 PM, Joerg <joergsch@xxxxxxxxxxxxxxxxxxxxx> wrote:
> The backplanes in our ultrasound systems are
> usually north of 4000 pins and I have never seen a case where there was
> not a schematic for that.
In analog IC design it's fairly easy to get schematics even bigger
than this - that's what you get when you extract the layout. Sure,
transistor level netlist would do fine for simulation but it is simply
convenient to have an extracted schematic of the cell (if only for
netlisting, DRC checks, manually finding some internal devices/nodes).
> Ok, if gEDA is geared towards ASIC/FPGA that's different. Then it sure
> won't be my kind of tool, just like BAE isn't (had tried it out lately).
Believe it or not, gEDA actually strongly focuses on the PCB flow.
Just look at the symbol attributes - pin numbers, footprints, even
reference designators come in PCB flavor. There is only partial
support for the design hierarchy, partial support for libraries,
partial support for other types of design data (RTL, netlists), no
functional netlisters, no DRC checks on the design. These issues can
often be "fixed" using external tools (makefiles, own netlisters and
rule checkers) but they are enough to discourage most designers from
even trying the tool. To be honest, looking at the traffic on this
list, I thought the PCB flow support is fairly decent (or the only one
that works, for that matter).
BTW, analog IC guys long since have given up using implicit power
connections and multi-slot symbols. People simply draw all the power
lines just like any other wires (sometimes even explicitly modeling
them with L/R/C circuits). Same with the cells (symbols in the PCB
world) - the closer the symbol is to its
schematic/RTL/layout/extracted view, the better, if only for LVS-ing
the design or juggling with schematic/extracted views in simulations -
multiple slots only add unnecessary complexity to the design. Such
schematics are perhaps a bit more difficult to understand but easier
to work with.
Regards,
-r
_______________________________________________
geda-user mailing list
geda-user@xxxxxxxxxxxxxx
http://www.seul.org/cgi-bin/mailman/listinfo/geda-user