This is strange in my simulation the attached circuit works fine. In
real life it kinda works but the signals are distorted like you can
see. I think that has something to do with the fact we used a pulse
transformer to try the circuit. If we disconnect Vx the signals stay
the same, so the distortion is in the transformer. If you say it
doesn't work then why doesn't it work?
On 22/06/11 22:39, Andy Fierman wrote:
Sorry Robert,
Both Wojciech and I are wrong.
His suggestion about adding a choke is basically the same as mine of
using a transformer. The idea of both is to add a dc path to ground at
the rectifier inputs. The difference is that the transformer adds DC
isolation - which if you include your bandpass filter - you do not
need.
Sounds like the thing to do but sadly, the simulations show the reality!
A choke does not do what you want and neither does a simple 1:1 transformer.
However, if you use a 1:1:1 transformer then it all comes together.
You can use a transformer with a 1:2 turns ratio, centre tapped and
keep to the original half wave rectifier scheme. If you use a three
winding transformer of 1:1:1 then you can use two bridge rectifiers.
Using bridge rectifiers doubles the ripple frequency so allows lower
smoothing C for the same ripple voltage.
The attached (not very good quality) pdf shows the non-working choke
and 1:1 transformer ideas and the working 1:1:1 transformer versions.
Note the 1u smoothing capacitor values. These were reduced to make the
simulation reach a steady state sooner than with the original 100uF
values.
Andy.
signality.co.uk
On 22 June 2011 01:12, Wojciech Kazubski [1]<wk0@xxxxx> wrote:
Hello all,
I would appreciate some expert advice.
I have a system which rectifies a sine wave input signal of 20Khz after
a LC filter (see Rectifier_sim.jpeg)
Everything works fine if LOAD_1 and LOAD_2 are equal. Vx is then
(almost) the same as Vin. And Vcc and Vss are equal to the positive or
negative part of the sine wave (less the DC losses) (Vss = -Vin_top and
Vcc = Vin_top).
BUT if LOAD_1 and LOAD_2 are not equal (like in Rectifier_sim.jpeg) it
seems that Vx is lifted (DC component added) and Vss moves to the 0V and
Vcc is lifted to twice the value I would expect (Vss = 0 and Vcc =
Vin_toptop) (see rectifiersmp.eps).
Our real life prototype shows the same behaviour as the simulation.
I need this set-up for my system to work and I can not guarantee that
the two loads always will be equal.
Vin can be anything between 10Vtt and 90Vtt.
I have tried adding a resistor from Vx to ground and that seems to help
but increases the current drawn from the source (V1) to a unacceptable
level. It should be a low power solution.
If I short-circuit C1 everything works fine again (V1 has a low
resistance output) but of course will disable the filter, which we don't
what.
Is there anyone here who can explain to me how and why this is happening
and if available can anyone suggest a solution to me.
I have been wrestling with this problem for a couple of days now, so any
help will be very much appreciated.
Many thanks,
Robert
There is no DC patch from Vx to ground. If both loads are equal, both
rectified curreant are equal and cancel one another. If the loads are
different, the imbalance current charges Vx node until both output currents
become equal again. To avoid this place a choke between Vx and ground.
Wojciech Kazubski
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