Re: gEDA-user: What is the current procedure and location to submit patches for PCB?

[Bob Paddock <graceindustries@xxxxxxxxx>]

> In order to control the sub-compositing of layers, I added a SL_FINISHED
> callout to the set_layer() hook, so that the GL HID could track when it
> needed to destroy / reassign resources used to sub-composite a given
> layer. (Or to finish off the compositing operation).
>
> I don't expect this would cause any differences in behavior to git HEAD
> code.

It is doing something funky with Group8, which is the 'outline' layer
in Marks board.
My changes don't care about groups at all really, they are strictly PostScript
header/format  issues.  Marks board worked fine with my GTK version.

Is 'outline' a special case someplace?  'outline' is coming out
as a page that has the markers and footer and nothing else (nothing
within the markers), randomly every 2nd to 3rd page.  Point me to your
GL version and I'll try building it when
I get home tonight.

Don't think it is related but why is there a message coming out of
SddErr, instead
of being put in the log window, about 'outline' being drawn on the
component and solder
layers?  Is this an error in the board file that causes this?  Both
Mark's board and mine
do it.  Stock version do this as well, so it is not related to my ps.c work.


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