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Re: gEDA-user: Color silk layers in pcb
On Sun, 05 Sep 2010 22:19:08 +0100
Peter Clifton <pcjc2@xxxxxxxxx> wrote:
> I'd keep the "non-copper" / "skip-drc" ideas separate. We might (at
> some point) have DRC rules for non-copper layers (not that I can
> think of them at the moment, perhaps apart from silk layer(s)).
Component outline vs. keep-in component layer, etc.
However at this point where we are now, this patch would be great help.
Levente
--
Kovacs Levente <leventelist@xxxxxxxxx>
Voice: +36705071002
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