Re: gEDA-user: next PCB release - 1.99za vs 4.0

[DJ Delorie <dj@xxxxxxxxxxx>]

> Having said that, I'd do you one step further, and move /all/ the
> layers into their own list structure. Each layer would have flags
> set to indicate if it was a copper, silk, keepout or virtual (ie,
> ratsnest) layer. They would also be tagged as being always on top or
> always on bottom, in the case of silk layers that we don't want
> ending up inside the board.

Yup, that's on the long-term plan.


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