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Re: [f-cpu] F-CPU architecture...

Michael Riepe wrote:

How large would the effort be to add SMT to the FC0 core? I'm thinking of approx. 3-fold SMT.

Too high, IMHO. In particular, the required changes to the register set and crossbar would be real speed killers.

I recently had an idea for light-weight parallel execution - let's call it "threadlets". By adding explicit fork/join instructions, an application could split itself into threadlets if it sees fit. Of course careful programming would be required because threadlets share the same register set.

The basic idea is that there is a variant of the jump instruction (with two arguments), called "fork":

    fork r2, r1

I was just reading Knuth's "Art of computer programing" that sounds like
Coroutines to me. I think by the time he updates his books from 1960's
era of computing to something new we still will be looking at 1990's era
of computing.
Looking at the older hardware you had a large amount
computers using decimal arithmetic rather than binary logic. Now days
you are stuck with 2's compliment math and it has several disadvantages
and as well as advantages as compared to other number systems and as in hardware designs . You still have people doing computer science with may other ways of looking at computing and that may be the way of future with the F-cpu.
Ben alias woodelf

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