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Re: gEDA-user: terminators



> longest clock Vs. shortest data and vice versa.
> 
> You want your data eye to be nice and big, the sampling clock right
> in the middle of it.  The cleaner the eye the slower your edge rates
> can go.

So, long story short... I need to redesign the board :-(

I tried adding serpentines but there isn't enough room to add more
than an inch or so, leaving another inch of mismatch.  If I reroute
the signals under the chip instead of around it, I can save an inch or
more, then serpentine the rest to match trace lengths.


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