Re: gEDA-user: discussion on what busses *mean*

[Dietmar Schmunkamp <dietmar@xxxxxxxxxxxxxxx>]

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Am 15.08.2010 22:25, schrieb DJ Delorie:
> 
>> D[15:0],A[1:16] with a branch called A[1:16]
> 
> I was thinking "the above renames the wires" but perhaps that's a bad
> idea.  Yeah, I guess it would have to create a bundle of 32 wires.
> 
> No reason you couldn't attach some random attribute to the bus that's
> just to give it a mnemonic name :-)

DJ,

in general I don't like having 2 names for the same net, Maybe I'm
biased with my experience of vhdl synthesis, normally the name that you
don't expect survives synthesis and the other one gets lost (and that
even may vary between two releases of the same tool). So having only one
name has advantages.
> 

> 
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> 


- -- 

Mit freundlichen Gruessen

Dietmar Schmunkamp
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