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Re: gEDA-user: wishful UI

At 12:57 PM 8/16/2010, you wrote:

On Mon, 2010-08-16 at 12:00 -0400, Rick Collins wrote:

> >
> >I think we should try to find a better name for the connection between
> >two nodes in a net, maybe segment?
>
> In the layout program I use, a segment is a single section of a PWB
> route between two points.  That is, it is the shortest specified
> portion of a route.  The entire connected entity is a net and a
> connection between two pins or a T vertex is a trace.  The trace is
> equivalent to what you are trying to describe.
>

True, segment was a bad propose from me. I am not sure if trace is
really good, in my mind trace is bound to a special shape...
Maybe we should simple say "connection between two points/pins/nodes.
(I still wonder about the term PWB, a google search does not really
help.)
PWB is Printed Wiring Board. I use PWB for the bare board because often PCB is used for an entire assembly with parts installed. In reality the two terms should mean the same thing, it is a matter of usage. The real problem is that people should call a circuit card assembly an "assembly" of some sort and not a PCB. Also, if you look up PCB you will find "Polychlorinated Biphenyls" which have nothing to do with circuit cards and are very undesirable... ;^)
As to "trace", there is still some advantage to using a term for a special meaning even if that special meaning is not what you first think of when you hear it. 



> A lot of the discussion in this list is conducted as if the
> functioning of schematics were the only consideration.  Why not start
> with what you are trying to do in the layout, consider what the
> layout tool needs to make that happen, then trace that back to what
> is needed in the schematic to support the layout?

Indeed, that is what I would do, if I would be alone...
Please note, I was not the one who has the "idea" of specifying
attributes on the schematic level. This discussion is really old, at
least it existed when Anthony Blake starts with his topological router
and we consider how to make that router more smart. And as Kai-Martin
told us, this concept is in Protel for ten years. So it is not an idea
at all, it is an concept, and the question is, how useful it is. I wrote
that down, with a small picture, because my memory is not too good...
The whole story started this time with ideas  of Andrew Poelstra, and it
may start again in a few months...
I think adding attributes to schematics is a good idea. But you need a way to convey that to the layout tool, what ever sort of tool that is, ASIC, FPGA, circuit card... No point in adding features to a schematic than can't be sent to or used by layout. 



> So much of this
> conversation just seems so disconnected from what might be needed to
> do real work.
>

This is true -- from time to time we have discussions from new users
with great ideas and wishes, but without the skills and time to program
that. Sometimes I am one of them.
I guess I am not thinking that there is a problem with implementation. My concern is value. How are these ideas to be used by... well, the users? After all, this is the geda-user list, no? If getting the work done is the hardest part of it all, then maybe I can help... 



> If you want to consider impedance, then lets start with the ways you
> would want to control impedance and figure out just what that demands
> of layout and then the schematic?  Normally when I am controlling
> impedance, I am using point to point connections with no branches or
> stubs.

Sure, this is the general and most important case.

>  But if they are kept short, a stub can be used with impedance
> controlled nets.  Likewise, I seldom have more than one receiver on
> an impedance controlled nets, but I can see where a bus might need to
> be impedance controlled even with many drivers and receivers.  So it
> seems like in layout you would need impedance on an entire net, not
> just a trace or subnet.  When would you want a layout to control
> impedance on a portion of a net and not the entire net?
>
> Rick
>

I do not really like to discuss all that details now. When we build a
new house, it is difficult to predict the final color of the inner
rooms. Indeed I think that a net with defined impedance should define
that impedance to the whole net, no need for subnets. But I may be
wrong. One special case is the example which I mentioned yesterday, when
we want to enforce a special shape of a net in the schematic level. But
for power supply nets, different attributes for different traces of a
net makes sense, and most devices need power supply.
Wow! Impedance was being discussed in the context of it being a property of a trace rather than then entire net. I suggest that it be considered how impedance control is used on the circuit card (or chip or whatever) and you compare that to picking the color of a room when designing a house! I see it as figuring out where you want the rooms and doorways before you plan for the plumbing and electrical. I see analogies used here a lot. But each person puts their own spin on them and in the end they often mean nothing.
I would like to understand your special case. I think that any new feature should be a broad as possible to include all sorts of special cases. What was that special shape? Are you talking about the linear net of three points? I would ask how does the layout tool enforce that currently? I think it is through some document from the circuit designer to the layout designer and the layout designer enforces it. So if you were to add this to the layout tool, what would the layout tool expect to see or how would it "think" about it? I think this is the overriding factor to consider. Then once this is clear, it can be extrapolated back through some feature in a net list and then how the schematic would represent this option to the user. Designing the tools from the schematic end seems like the tail wagging the dog to me. Does that not make sense?
I have had concerns with similar problems relating to PWB features like traces between pins of a jumper. Sometimes I connect the pins of a jumper by a trace so that the two nets are tied by default. In production if a jumper block is to be used, the trace can be cut so that a jumper block can be used to connect or not connect the two nets. So are these two nets or one net? I have kept them as two nets and make a special jumper footprint which contains the short trace which can be cut. In general, I like the idea of keeping subnets separate as nets and using some means on the schematic to show they are connected in a "special" way, such as at a given device pin or at a particular point in the layout, not on a pin. That just seems more general to me.
Of course, this is not related to the issue of adding properties to nets which I think is very desirable. Describing impedance or matched lengths and other features on a schematic can be very useful, especially if the layout tool has a way of "enforcing" it rather than it just being notes. I spend more time verifying my designs than I do designing them in the first place. "Enforcement" is a great way to support verification. 



Best regards,

Stefan Salewski



Regards,
Rick 


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