Re: gEDA-user: Layer selective DRC

[Colin D Bennett <colin@xxxxxxxxxxx>]

On Sat, 13 Aug 2011 19:34:38 +0200
Levente Kovacs <leventelist@xxxxxxxxx> wrote:

> On Fri, 5 Aug 2011 17:36:25 +0000 (UTC)
> Sparky <scopaev@xxxxxxxxx> wrote:
> 
> > For my outline layer I did the following to add the attribute:
> >   Edit->Edit attribute of->CurrentLayer
> >   Left box:  PCB::skip-drc
> >   Right box: 1
> 
> I'm sorry for the late answer.
> 
> I'm not sure if you need this for the layer called "outline".
> 
> For the others, thank you for taking time playing with it. I didn't
> experienced any trouble with the feature. However, I'm not a heavy
> DRC user.

I get "line too narrow" errors for my outline layer, due to the 1 mil
lines with which I draw the outline.

Also, and not completely related in the current DRC implementation, my
outline layer makes pcb think there are unintended connections when it
intersects vias near the edge (e.g., castellated vias) creating what
appears to pcb to be a circuit from a net on another layer, to the
outline, to another net on a non-outline layer.

Regards,
Colin


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