Re: gEDA-user: inverted pins?

["Samuel A. Falvo II" <sam.falvo@xxxxxxxxx>]

On 2/21/06, DJ Delorie <dj@xxxxxxxxxxx> wrote:
> inverter gate.  You need to name the nets differently *anyway*.
>
>                 ___
>      AEN        AEN
>     -------|>o-------


      AEN        DEN  (data enable)
     -------|>o-------

      AEN        ADIS  (address disable)
     -------|>o-------


>               ___
>               TXD
>     -------|>=======
>               TXD


               TXNEG
     -------|>=======
               TXPOS

               TXB (transmit balance)
     -------|>=======
               TXCB (transmit counter-balance)

               TXR (transmit ring)
     -------|>=======
               TXT (transmit tip)

The bar's significance stems from boolean algebra, and carries no
intrinsic meaning of intent.  I think, as with self-documenting
software, self-documenting hardware designs are more important. 
Signals should describe what they do as much as possible.  Case in
point: NRFD and NDAC from the GPIB bus.  Every signal on GPIB is
active low, so they just don't bother with the overbar there. 
Instead, they use more descriptive names instead (Not Ready For Data
and No Data Accepted, respectively).

--
Samuel A. Falvo II