Re: gEDA-user: PCB footprint mapping

[Dan McMahill <dan@xxxxxxxxxxxx>]

Karel Kulhavy wrote:
> On Mon, Feb 20, 2006 at 10:02:48AM -0500, Phil Taylor wrote:
>
> > Karel I agree that the s/n is an issue that geda/PCB faces.  It is a real
> > issue.
> >
> > I do suppose though, that I would warm up to your comments about scrapping
> > gedasymbols (which isn't even your work) if you had some other recommendation.
> >
> > What are you doing, besides your salvos of improvement suggestions, to better
> > the symbol/footprint system for geda/pcb?
>
>
> Drawing footprints. 2 days ago I drew DB9M connector footprint because the
> existing one wasn't indicating boundaries of the component in silkscreen
> line. On Ronja I have 13 footprints and one script to generate shielding
> rim footprints of various lengths and I would upload them somewhere if
> there was such a facility.

With footprints, there is the real issue to deal with which is how to
provide any sort of organization and also any sort of quality control.

We have already seen this issue with something so simple as a 1206
resistor footprint.  There are multiple versions in the PCB libraries:

~generic has a "1206, chip_resistor"
~generic has a "Resistor, smd chip 1206"
~genericsmt has a "3100,1550,450, SMT 1206 type capacitor/resistor"
~gtag has a "sm1206, SMT 1206"
~geda has a "1206, Standard SMT resistor, capacitor, etc."

newlib has one too:

newlib/generic_SMD_packages/1206_reflow_solder

In addition, ~geda contains complete 3-tiered IPC footprints which use
the IPC-7351 standard for both naming and the footprint. This represents
9 more 1206 footprints (least, nominal, most for capacitors, resistors,
and inductors).

Ok, now we have 15 footprints for 1206.  I'll bet other people have them
in their private libraries too.  So which to use?  My take is you should
always use the IPC named footprints from ~geda because

1)  the pads have been designed to produce a reliable solder joint

2)  you have a better chance at getting what you thing you're going to
get, if it follows the IPC name, it had better also follow the layout.

3)  when/if I ever get around to implementing some non-copper layers
like placement keepout regions, the data is actually already there for
implementing the IPC placement courtyard.  Component height is not
included yet but could be.

4)  the silk is done in a way which is consistent with industry
standards and you have a decent chance at it being pretty good

5)  you have a 3 tiered choice.

But, this information isn't really documented anywhere.

In terms of vendor specific footprints which don't really quite fall
into the IPC naming convention, the ~bourns, ~amp, ~amphenol,
~minicircuits, ~johnstech, ~cts, and ~panasonic libraries follow vendor
provided drawings and follow a somewhat undocumented but simple naming
convention (VENDORNAME_<vendor part number or footprint/package code>).

So one of the real reasons I've never gotten around to implementing any
sort of upload mechanism for footprints is that I've also not written
down and published an exhaustive list of exactly how footprints must be
done to be accepted into the main pcb distribution.  I really feel
without both this document and some 3rd party volunteers to audit
footprints for compliance as they are added that what we'd quickly end
up with is a rather large collection of footprints where you can't find
anything and you have no idea which ones you can even remotely trust.
Some may argue that we already have this situation and I think there is
a good bit of truth in that.  I just don't want to make it worse.

What I have been doing in the spirit of not making it worse is I
implemented and contributed a complete set of resistor, capacitor, and
inductor footprints for 0201 through 1825 sizes.  Also the vendor
specific libs mentioned above _should_ be good.  Problem is no one has
audited any of that work.

John wrote or at least started on a document which covers some of the
details but I think more needs to be done.

What else... there is the issue of "heavy" vs "light" footprints.
You'll see some footprints in the PCB libraries where the pins have
names like "INP" "INM" "OUT" instead of just being generic packages.
Personally I'm opposed to including that level of information in the
footprint.  I'd rather make the footprints generic and propagate that
information forward from the schematic capture tool.  But, I think there
may be some users who don't use gschem as the front end or may not even
(gasp) use schematics.

So to summarize, if someone really wants to help get the footprint
library hammered into shape and into a condition where I'd feel like
including it in a pcb release is actually a net benefit, I think the
following needs to be put in place:

= A complete style guide which includes:

  - unambigous naming convention.  Based heavily on IPC-7351 for what
that standard covers.  When thats not covered, I'd use vendor specific
names.  In other words, I'd avoid DB-9 but use AMP_<amp part number>  or
ASSMANN_<assmann part number>.  This prevents problems where different
vendors have variations in the same basic component.

  - policy on silk screen -- outline or not?  silk width?  when to omit
it?  indication of polarity or pin 1?  Again, I'd use IPC-7351 as a
starting point.

  - soldermask relief -- how much to add, when to remove all soldermask
in an area.

  - how much to grow holes by for through hole parts

  - min/max range for annular ring on through hole parts

  - zero rotation and origin of the part.  Currently these are not
really used by pcb except when the part is first instantiated but this
is something I really want to change.  In fact I think it will be
required to help manage footprint updates.  So we need guidelines on
where the origin is (pin 1?  centroid?) and what 0 rotation means.  IPC
specifies this for lots of SMT stuff.

  - more that I'm not thinking of off the top of my head

= A copyright policy.  Some considerations:

  - ability to order proprietary boards, this shouldn't be a problem

  - what about selling a proprietary layout?  pcb embeds the footprint
in the .pcb file so can I offer a .pcb file for sale to someone if the
footprints are GPL?  Probably not.

  - desire to promote free footprint libraries to work with our free
layout tool

= A review policy

  - do we accept footprints with no auditing?  Maybe just naming
convention auditing?  Maybe we should have someone verify that the pin
numbering matches the standard/datasheet.  Maybe a full audit?  Do we
have any qualified people who care to act as auditors?

= A way to maintain a list of "good" footprints.  Something which is
easily searchable and sortable would be most useful.  In fact a
searchable "footprint browser" could really help when creating schematics.


Anyway, these are some of the reasons why I still haven't done more to
try to get footprints into the main pcb distribution.

-Dan