Re: gEDA-user: Missing the printable docs for gschem

[John Doty <jpd@xxxxxxxxxxxxx>]

On Nov 29, 2007, at 8:49 AM, Dan McMahill wrote:

> John Doty wrote:
>> On Nov 29, 2007, at 8:05 AM, John Griessen wrote:
>>
>>> Ben Jackson wrote:
>>>
>>>> I was thinking gschem could use a 'make symbol' wizard for that.
>>>> It'd
>>>> be nice if you could draw a subcircuit and just have the IO pins  
>>>> turn
>>>> into a simple boxsym automatically.  It would make it much  
>>>> easier to
>>>> build hierarchical schematics that have a nice, clear toplevel  
>>>> block
>>>> diagram as the first sheet.
>>>
>>> Sure, yes, SOP using Cadence.
>>
>> OK, same question, different emphasis: how does Cadence know how to
>> arrange the pins?
>>
>
> you get a dialog box with a text entry for top, bottom, left, right
> side.  The entries come filled in by default with inputs on the left,
> outputs on the right.  I typically then cut/paste to which side I want
> and set the order.  Then the symbol is created.  Users can set up
> default symbol templates too in case there is a standard set of things
> you want created.  In the geda world it might be a set of  
> attributes and
> their visibility.
>
> It works pretty well as a starting point.

OK, rather like tragesym, but with automatic label generation. That  
would be nice to have.

>
> The "create cellview from cellview" thing in cadence can go from  
> symbol
> or schematic to schematic, symbol, verilog, verilog-a, etc.  If you're
> going from say symbol to verilog-A, you get a text editor with the
> module definition line and i/o's declared and an empty body.
>
> -Dan
>
>
>
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John Doty              Noqsi Aerospace, Ltd.
http://www.noqsi.com/
jpd@xxxxxxxxx




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