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Re: gEDA-user: VeriWell now on SourceForge





On 9/27/05, Udi Finkelstein <geda@xxxxxxxx> wrote:

> simulator. So if you want to make a chip, you have to deliver a
Sorry, but you are out of date. Verilog XL is an interpretted simulator
that belongs in the Museum. Nobody is using it today.

hmm  interesting observation...  In the company I work (9000+ people), we can NOT
do our simulation without verilog-XL. It is very handy, convenient and nicely integrated into
our design flow, especially during mixed signal simulation ( Cadence Analog Artist ).

I have to talk to our CAD support group and check if we are really so much behind the curve ;)
 

Regards

Nobody ;-)