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Re: gEDA-user: Bug report for renaming slots [Was: Re: gEDA on windows]



Peter Clifton wrote:
> On Mon, 2009-01-12 at 17:26 -0800, Joerg wrote:
> 
>> I am not a programmer but one method I could imagine would be to have a 
>> switch that disallows splintering up slotted devices, meaning the 
>> devices can get other refdeses but it must be the same for all slots of 
>> a device. It's the same for transistor arrays when temperature-tracking 
>> will be lost if slots are mixed up. I believe it would be ok to do such 
>> disallow or allow as a general setting, for the whole schematic.
> 
> Thanks for the suggestion.
> 
> 
> Actually, your idea has got me thinking more about how we handle
> attributes on slotted parts, and the possibility that they could in some
> way be treated as an aggregate component for the purposes of attributes
> other than "slot=".
> 

Not 100% sure if I understand correctly but yes, treating all slots as 
one component would be feasible. Even if you don't use all you must 
usually place all slots anyhow and, for example, connect inputs to GND. 
Exception being transistor arrays but even they should also be grounded 
and be on the schematic so folks can see what's available for cut/jumper 
style rework purposes.


> Your example quoted suffixed refdes, such as U1A, U1B etc. I know that
> is often standard practice in some tools, however I gave up on this with
> gEDA because it causes confusion at the netlist stage.
> 

That would be a serious one. I can't recall a single company I dealt 
with not using A, B, and so on (upper case). Most CAD programs 
auto-assign those when you place until you run out of slots. So if you 
place eight slots of a six-slot 74HC14 it bumps the refdes number for 
the last two you place. They don't all do it perfectly. OrCad usually 
does but I've had Eagle "forget" when I began placing some more slots 
later. gschem just places all as first slots with U? right now.


> Whilst PCB drops lowercase suffixes, not uppercase - gnetlist doesn't
> drop any suffixes. I tried to teach it to drop lowercase refdes
> suffixes, but that broke some hierarchy infrastructure (which uses the
> refdes of an IO marker component) so it had to be reverted.
> 
> As a workaround, the refdes= could be hidden, and a "label=" or similar
> attribute could be used on the schematic if you wanted the suffixes.
> Knowing me though, I'd just get those out of sync with the refdes and
> get myself lost debugging the issue.
> 
> Naturally though, if we had any slot-specific label, or refdes, that is
> another class of attribute which couldn't be shared as being common to
> group of slotted parts.
> 

A label would be ok, as long as it shows correctly on the schematic. But 
yes, one can get out of sync.

> 
> Whilst we're almost on the topic:
> 
> There is a bug in gnetlist, that the slot it sees first determines which
> attributes are discovered for a particular refdes. (Not the union of
> attributes attached to all slots).
> 
> If you put footprint= on slot #1, but the netlister picks up attributes
> from slot #2, and doesn't find your footprint= attribute.
> 
> It would appear from my own testing, that the first symbol encountered
> in the schematic file with a given name is the one which determines
> attributes. This is why I recommend to people that they should set the
> "footprint=" attribute on all slots when using slotted parts.
> 

Yes, setting it for all slots makes sense. Also for the case where a 
lone U3C is found by others and they want to know whether it's a SO16 or 
TSSOP.


> I'm planning to do some work on gnetlist / netlisting in libgeda for the
> 1.8 series, so I'll see if I can address this issue during the next
> development cycle.
> 

Great! But again, don't do that just because I brought it up, only when 
you feel that it benefits the community.

-- 
Regards, Joerg

http://www.analogconsultants.com/



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