Re: gEDA-user: next PCB release - 1.99za vs 4.0

[timecop <timecop@xxxxxxxxx>]

Most places handle this with the "assembly" layer.
Of course, this wouldn't be part of DRC, but you'd have to be blind
put stuff overlapping assembly layers and not see it right away.


On Sun, Sep 12, 2010 at 2:40 PM, Jonathon Schrader
<jlschrad@xxxxxxxxxxxx> wrote:
>  I apologize in advance if this has already been suggested somewhere in this
> thread, but one thing that I've thought about footprints while reading the
> thread is keepouts.
>
> Allowing for putting keepouts in the footprints is a very important addition
> to whatever gets decided, but what about separating placement keepouts from
> trace keepouts?  That is, a footprint (such as the battery mount mentioned
> previously) with a requirement not to place any parts between the tabs, but
> traces are fine?  Unfortunately, though, it'd wind up like the silk layer
> issue - that is, they'd only be needed (or relevant, that is) on the top and
> bottom layers of the board.)
>
> I suppose it's a question that could simply be covered with a design review
> or such, but I know I've made board errors in the past that would likely
> have been cleaned up with a simple "hey - you can't put a part there..."
> note from the DRC...
>
> BTW, you've all got a really great tool going!  I've used it for several
> designs now, and haven't had a (tool related) problem yet.
>
> Thanks!
> -Jon
>
> On 9/11/2010 11:24 PM, DJ Delorie wrote:
>>
>> My thoughts were that each drawing layer (copper, silk, keepout,
>> whatever) could belong to a specific physical layer, "top", "bottom"
>> "all inner", or "all".  I suppose we'd need an "all outer" for
>> orthogonality.  The top/bottom magic are needed to map footprints on
>> import, but I suspect things like silk and mask will end up in
>> top/bottom instead of a specific layer like 0 or 3.
>>
>> Drawing layers that belong to the same physical layer are in the same
>> layer group (duh).
>>
>>
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>
>
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